1. Technical Field
The present disclosure relates to a non-volatile memory device and, more particularly, to a non-volatile memory device and method capable of programming and re-verifying a verified memory cell.
2. Discussion of Related Art
Non-volatile memory devices include a mask ROM (read only memory), an electrically erasable and programmable ROM (EEPROM), and an erasable and programmable ROM (EPROM). The EEPROM that is electrically erasable and programmable is widely used as an auxiliary memory device or for system programming that requires continuous updating.
More specifically, a flash EEPROM, hereinafter, referred as the flash memory device, that exhibits a higher degree of integration than the existing EEPROM is very advantageous for high capacity auxiliary memory devices. The flash memory device includes a NAND type, a NOR type, and an AND type. The NAND type flash memory device, which has a high degree of integration, is mainly used for storing data. The NOR type flash memory device, which has a fast data access speed, is mainly used for storing program codes.
The non-volatile memory device includes a plurality of memory cells having a MOS transistor structure with a floating gate and a control gate. The memory cells are electrically programmable and erasable.
In general, it is essential for the non-volatile memory device that is electrically programmable and erasable to be able to function to verify memory cell data. The verification function verifies whether programmed data is accurately written to a memory cell and to correct the data when inaccurate data exists.
A flash memory device having a multilevel cell, for example, a four-level cell, that has been recently developed can store 2 bits in a single cell, unlike a single level cell. The flash memory device including the multilevel memory cells in a four-level state needs a more accurate programming and verifying technique compared to a conventional flash memory device having memory cells in a two-level state. Thus, to increase the accuracy of verification, even when a verification of a programmed memory cell is successful, the flash memory device having the multilevel memory cells requires at least one re-verification of the verified memory cell.
A NOR flash memory device of a multilevel memory cell uses an algorithm of a buffer program to compensate for a program speed that is slower than a single level cell. FIG. 1 illustrates the concept of a flash memory device performing programming and verification using a conventional buffer program algorithm. Referring to FIG. 1, M number of program data PDATA, for example, #1 where M is a natural number, are stored in a program data buffer 10. A memory cell array block 20 programs a plurality of memory cells (not shown) based on the stored program data, for example, #1. The PDATA may be N bits of program data, where N is a natural number.
A memory cell array block 20 programs the memory cells and verifies the programmed memory cells. The verified results VD are written back to the program data buffer 10 and stored therein. The memory cell array block 20 overwrites a bit data corresponding to a memory cell that is successfully verified among the program data, for example, #1, stored in the program data buffer 10, as a first level value, for example, “1”. The memory cell array block 20 repeats the programming and verification operations until the identification of the memory cells that are not successfully verified, and the verification results are written to the program data buffer 10.
Because the bit data corresponding to the memory cell that is successfully verified among the program data, for example, #1, stored in the program data buffer 10 is written by being corrected to the first level value, for example, “1”, after the onetime verification has succeeded, the program data buffer 10 loses the original program data programmed in the memory cells. Thus, since each bit data of the program data, for example, “10101010” of #1, stored in the program data buffer 10 corresponding to the memory cell that are successfully verified once, is changed to the first level value, for example, “11111111” of #1′, it is a problem that additional programming and verification cannot be performed with respect to the memory cell that has been successfully verified once.